H. N. Naveen


Career Summary


v       Master of Technology in Industrial Electronics.

v       More than 9 years of Hardware Design experience.

v       Design and development of Complex high speed, multi-layer multimedia bring-up and production

boards, Chip Characterization, Handheld product development, Ultra Low Cost (ULC) GSM handsets.

v       Development of Synopsys (LMC) Hardware models for processors and communication devices.

v       Hardware Skills         :   Design of complex high speed multimedia test boards and

                                                Production boards, Chip characterization, Design of GSM

                                                handsets, Product Tear Down analysis, Board testing, validation

v       Hardware Tools          :   Analog/Digital Oscilloscope, Thermonics T-2500, TPO4100,

                                             Logic analyzer, Spectrum Analyzer, CMU200, In-Circuit

                                             Emulators, JTAG emulator, Synopsys Hardware Modeler,

                                             Microcontroller programmers.

v       Hardware Platform     :   NXP Media Processors (PNX1500, PNX1700, PNX100x),

                                             TI Calypso and NXP Nexperia 5110 Cellular phone platforms

v       Software Skills           :   Device driver development,

v       Software Tools           :   Schematic Capture (Orcad, ViewLogic), PCB Designing (Pads

                                             PCB), Gerber Validation (GC-PREVUE), HDL Simulation (VCS),

                                             Configuration management (CVS, Perforce).

v       Microcontrollers         :    Cypress Microsystems PSoC CY8C27443, Zilog Z8Encore,

                                             Motorola MC68HC908, Microchip PIC24FJ

v       Interface Knowledge  :    DDR2, PCI, Video, USB-OTG, I2C, I2S.

v       Languages                 :    ‘C’, Verilog HDL, Intel 8051 and ADSP21xx Assembly.

v       OS                              :    UNIX (Sun Solaris), Linux, Windows.

v       Soft skills                    :    Innovative and creative, Possess excellent analytical and

                                          communication skills.


Professional Experience


From Sep 2007

Lead Engineer at Sasken Communication Technologies, Bangalore

·                Design of complex, multi-layer multimedia processor (PNX1005) bring-up and PCI based production board.

·                Designed four types of boards for different variants of the processor

·                Interfaces involved – PCI, DDR2, I2S, HDMI, CVBS, S-Video, USB-OTG, LAN, SATA, IDE, UART and SD Card interfaces.

·                Involved in hardware design, board bring-up, board validation and chip characterization.

·                Responsibilities include Defining board specifications, component selection, datasheet study, interaction with component vendors, silicon ball assignment finalization, circuit design, Schematic entry, BOM creation, component placement, Device socket selection, PCB layout review, interaction with EMS house, board validation and testing, support to software team & customers and documentation.

·                Interaction with the mechanical design team for PCI bracket design and package box design.

·                Designed innovative adapter to validate the new board with previous silicon.

·                Create hardware training material on PNX100x for end customers

·         Received appreciation from customer on the boards designed.

·         Received Team of Quarter award during the project

·         Received Achiever of Quarter award during the project


Feb 2007 to

Sep 2007

Senior Design Engineer at Sasken Communication Technologies,


·         Tear Down Analysis of electronic products.

·         Involved in hardware logic design.

·                Responsibilities include Study of product, step-by-step dis-assembly of product, Unique product feature analysis, Macro photography, BOM analysis, System cost analysis, product improvements, production cost reduction analysis, Preparation of Tear Down Report.

·         Tear down analysis done on several cellular phones and portable electronic devices.


Dec 2005 to

Feb 2007

Senior Design Engineer at Quasar Innovations Pvt. Ltd., Bangalore

·         Design of Ultra Low Cost (ULC) GSM handsets..

·         Involved in hardware logic design.

·         Responsibilities include Study of reference platform, Defining specifications, Circuit design, Datasheet study, Component selection, Discussion with component vendors, Schematic entry, PCB layout review, Board testing and Documentation.

·         Interaction with the mechanical design team for Industrial design and mechanical design of handsets.

·         Designed several ULC handsets based on NXP and TI platforms.


·         Analyze and reduce TDMA noise in GSM handset.

·         Interfacing a thermal printer to GSM modem.

·         Designed accessories for handset like charger, dongles etc.,

·         Managed a team comprising of PCB designer, component engineer, testing engineers


Jan 2001 to

Dec 2005

Senior Design Engineer at Sasken Communication Technologies,


·         Individual contributor in Hardware Modeling group. Hardware modeling is a proprietary technology of Synopsys.

·         Developed hardware models for ARM7TDMI, IXP1200, IXE2412, V30MZ, MC68302, M80310, PPC405GPr, MPC7447A, I82C54 etc., devices. These models are used in board level simulation.

·         Responsibilities include Design of Device Adapter Hardware, Datasheet study, Component selection, PCB layout review, Board testing, Writing test scripts in Verilog, Simulating the device using Synopsys VCS, QA testing and Customer documentation.

·         Verification of Synopsys Design ware PCI-X IP core.

·         On-site work Involved creating test cases and Documentation.

·         Received citation from the customer for identifying critical bugs in the IP core.


Jun 2000 to

Dec 2000

Design Engineer at Infotech Innovation Research Lab (IIRL),


·         Worked on MPEG1 Layer 3 algorithm


Jun 1999 to

Jun 2000

Project Trainee at Analog Devices India Pvt., Ltd., Bangalore

·         Designed hardware for Differential GPS receiver (DGPS).






Institution - Sri Jayachamarajendra College of Engineering, Mysore

University - Visveswaraya Technological University, Belgaum, 1998 - 2000

Grade – First Class with Distinction, Percentage - 78% - University 2nd Rank


Institution - Sri Jayachamarajendra College of Engineering, Mysore

University - University of Mysore, 1993 - 1997

Grade – First Class, Percentage - 69%


Additional Qualification:

Karnataka State Open University (KSOU), Mysore, 2000


National Law School of India University (NLSIU), Bangalore, (Undergoing)


Additional Information


Training Programmes:

·         Hardware Model Development, Sasken, Bangalore, Jan-Apr 2001

·         Verilog HDL training, Sasken, Bangalore, Sep 2002

·         Capability Maturity Model, Sasken, Bangalore, Mar 2003

·         ISO-9001:2000 Quality Training,  Sasken, Bangalore, Jun 2003

·         NXP 5110LC Platform Training, NXP Bangalore, Sep 2006



·         Application Note AN2051, "Precision Digital Controller", Cypress Microsystems, USA, Nov 2002.

·         Application Note AN2xxx, "Interfacing PS/2 Keyboard using SPI Slave", Cypress Microsystems,

USA, Apr 2005.


Papers Presented/Submitted:

·         “A simple, low cost method for re-balling a BGA device”, WACI paper submission, DAC-2009.

·         “BGA PWB: A Simple, Low Cost Method for Testing Complex Embedded Boards”,

WACI paper submission, DAC-2009.

·         "Intelligent Transportation: Fleet Management System", CYBERIA-2000, National level technical event,

IEEE, SJCE chapter, Mysore, May 2000.

·         "SSTV: A new approach in High frequency low bandwidth picture transmission", CYBERIA-98,

National level technical event, IEEE, SJCE chapter, Mysore, May 1998.

·         "Advanced Digital Communication Modes in Amateur Radio", Southern Region Conference of IETE,

Mysore, June, 1998.

·         "Multimode Communication Processor for Computing at RF", CYBERIA-97, National level technical event,

IEEE, SJCE chapter Mysore, May 1997.



Circuit Cellar, USA and Cypress Microsystems, USA.

and Zilog, USA.

Circuit Cellar, USA and Motorola Inc, USA.

Cypress Microsystems, USA.

application using MOTOROLA MC68HC705P6A Microcontroller.